patch-2.3.10 linux/arch/i386/kernel/setup.c
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- Lines: 45
- Date:
Mon Jul 5 20:04:47 1999
- Orig file:
v2.3.9/linux/arch/i386/kernel/setup.c
- Orig date:
Tue Jun 8 10:42:46 1999
diff -u --recursive --new-file v2.3.9/linux/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
@@ -11,7 +11,7 @@
* Zoltan Boszormenyi <zboszor@mol.hu> February 1999.
*
* Force Centaur C6 processors to report MTRR capability.
- * Bart Hartgers <bart@etpmod.phys.tue.nl>, May 199.
+ * Bart Hartgers <bart@etpmod.phys.tue.nl>, May 1999.
*
* Intel Mobile Pentium II detection fix. Sean Gilley, June 1999.
*/
@@ -690,8 +690,8 @@
NULL, NULL, NULL, NULL }},
{ X86_VENDOR_INTEL, 6,
{ "Pentium Pro A-step", "Pentium Pro", NULL, "Pentium II (Klamath)",
- NULL, "Pentium II (Deschutes)", "Mobile Pentium II", NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }},
+ NULL, "Pentium II (Deschutes)", "Mobile Pentium II", "Pentium III (Katmai)",
+ "Pentium III (Coppermine)", NULL, NULL, NULL, NULL, NULL, NULL }},
{ X86_VENDOR_AMD, 4,
{ NULL, NULL, NULL, "486 DX/2", NULL, NULL, NULL, "486 DX/2-WB",
"486 DX/4", "486 DX/4-WB", NULL, NULL, NULL, NULL, "Am5x86-WT",
@@ -799,16 +799,15 @@
/* Names for the Pentium II Celeron processors
detectable only by also checking the cache size */
if ((cpu_models[i].vendor == X86_VENDOR_INTEL)
- && (cpu_models[i].x86 == 6)){
- if(c->x86_model == 6 && c->x86_cache_size == 128) {
+ && (cpu_models[i].x86 == 6))
+ {
+ if(c->x86_model == 5 && c->x86_cache_size == 0)
+ p = "Celeron (Covington)";
+ else if(c->x86_model == 6 && c->x86_cache_size == 128)
p = "Celeron (Mendocino)";
- }
- else {
- if (c->x86_model == 5 && c->x86_cache_size == 0) {
- p = "Celeron (Covington)";
- }
- }
- }
+ else if(c->x86_model == 5 && c->x86_cache_size == 256)
+ p = "Celeron (Dixon)";
+ }
}
}
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