patch-2.2.12 linux/drivers/isdn/hisax/isar.h
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- Lines: 121
- Date:
Wed Aug 25 17:29:47 1999
- Orig file:
v2.2.11/linux/drivers/isdn/hisax/isar.h
- Orig date:
Mon Aug 9 16:05:55 1999
diff -u --recursive --new-file v2.2.11/linux/drivers/isdn/hisax/isar.h linux/drivers/isdn/hisax/isar.h
@@ -1,10 +1,13 @@
-/* $Id: isar.h,v 1.3 1999/07/01 08:11:46 keil Exp $
+/* $Id: isar.h,v 1.4 1999/08/05 20:43:20 keil Exp $
* isar.h ISAR (Siemens PSB 7110) specific defines
*
* Author Karsten Keil (keil@isdn4linux.de)
*
*
* $Log: isar.h,v $
+ * Revision 1.4 1999/08/05 20:43:20 keil
+ * ISAR analog modem support
+ *
* Revision 1.3 1999/07/01 08:11:46 keil
* Common HiSax version for 2.0, 2.1, 2.2 and 2.3 kernel
*
@@ -39,6 +42,7 @@
#define ISAR_HIS_P12CFG 0x24
#define ISAR_HIS_SARTCFG 0x25
#define ISAR_HIS_PUMPCFG 0x26
+#define ISAR_HIS_PUMPCTRL 0x2a
#define ISAR_HIS_IOM2CFG 0x27
#define ISAR_HIS_IOM2REQ 0x07
#define ISAR_HIS_IOM2CTRL 0x2b
@@ -70,12 +74,97 @@
#define ISAR_DP1_USE 1
#define ISAR_DP2_USE 2
+#define ISAR_RATE_REQ 3
+#define PMOD_DISABLE 0
+#define PMOD_FAX 1
+#define PMOD_DATAMODEM 2
+#define PMOD_HALFDUPLEX 3
+#define PMOD_V110 4
+#define PMOD_DTMF 5
+#define PMOD_DTMF_TRANS 6
#define PMOD_BYPASS 7
+#define PCTRL_ORIG 0x80
+#define PV32P2_V23R 0x40
+#define PV32P2_V22A 0x20
+#define PV32P2_V22B 0x10
+#define PV32P2_V22C 0x08
+#define PV32P2_V21 0x02
+#define PV32P2_BEL 0x01
+
+#define PV32P3_AMOD 0x80
+#define PV32P3_V32B 0x02
+#define PV32P4_48 0x05
+#define PV32P5_48 0x11
+#define PV32P4_UT48 0x0d
+#define PV32P5_UT48 0x11
+#define PV32P4_96 0x03
+#define PV32P5_96 0x11
+#define PV32P4_UT96 0x0f
+#define PV32P5_UT96 0x11
+#define PV32P4_B96 0x0b
+#define PV32P5_B96 0x91
+#define PV32P4_UTB96 0x0f
+#define PV32P5_UTB96 0xd1
+#define PV32P4_120 0x09
+#define PV32P5_120 0xb1
+#define PV32P4_UT120 0x0f
+#define PV32P5_UT120 0xf1
+#define PV32P4_144 0x09
+#define PV32P5_144 0x99
+#define PV32P4_UT144 0x0f
+#define PV32P5_UT144 0xf9
+#define PV32P6_CTN 0x01
+#define PV32P6_ATN 0x02
+#define PFAXP2_CTN 0x01
+#define PFAXP2_ATN 0x04
+
+#define PSEV_10MS_TIMER 0x02
+#define PSEV_CON_ON 0x18
+#define PSEV_CON_OFF 0x19
+#define PSEV_V24_OFF 0x20
+#define PSEV_CTS_ON 0x21
+#define PSEV_CTS_OFF 0x22
+#define PSEV_DCD_ON 0x23
+#define PSEV_DCD_OFF 0x24
+#define PSEV_DSR_ON 0x25
+#define PSEV_DSR_OFF 0x26
+#define PSEV_REM_RET 0xcc
+#define PSEV_REM_REN 0xcd
+#define PSEV_GSTN_CLR 0xd4
+
+#define PCTRL_LOC_RET 0xcf
+#define PCTRL_LOC_REN 0xce
+
#define SMODE_DISABLE 0
+#define SMODE_V14 2
#define SMODE_HDLC 3
#define SMODE_BINARY 4
+#define SMODE_FSK_V14 5
+
+#define SCTRL_HDMC_BOTH 0x00
+#define SCTRL_HDMC_DTX 0x80
+#define SCTRL_HDMC_DRX 0x40
+#define S_P1_OVSP 0x40
+#define S_P1_SNP 0x20
+#define S_P1_EOP 0x10
+#define S_P1_EDP 0x08
+#define S_P1_NSB 0x04
+#define S_P1_CHS_8 0x03
+#define S_P1_CHS_7 0x02
+#define S_P1_CHS_6 0x01
+#define S_P1_CHS_5 0x00
+
+#define S_P2_BFT_DEF 30
+
+#define IOM_CTRL_ENA 0x80
+#define IOM_CTRL_NOPCM 0x00
+#define IOM_CTRL_ALAW 0x02
+#define IOM_CTRL_ULAW 0x04
+#define IOM_CTRL_RCV 0x01
+
+#define IOM_P1_TXD 0x10
#define HDLC_FED 0x40
#define HDLC_FSD 0x20
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