patch-2.2.14 linux/arch/alpha/math-emu/fp-emul.c

• Lines: 452
• Date: Wed Dec 31 16:00:00 1969
• Orig file: v2.2.13/linux/arch/alpha/math-emu/fp-emul.c
• Orig date: Tue Oct 19 17:10:36 1999

diff -u --recursive --new-file v2.2.13/linux/arch/alpha/math-emu/fp-emul.c linux/arch/alpha/math-emu/fp-emul.c
@@ -1,451 +0,0 @@
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-
-#include <asm/uaccess.h>
-
-#include "soft-fp.h"
-#include "double.h"
-#include "single.h"
-
-#define	OPC_PAL		0x00
-#define OPC_INTA	0x10
-#define OPC_INTL	0x11
-#define OPC_INTS	0x12
-#define OPC_INTM	0x13
-#define OPC_FLTC	0x14
-#define OPC_FLTV	0x15
-#define OPC_FLTI	0x16
-#define OPC_FLTL	0x17
-#define OPC_MISC	0x18
-#define	OPC_JSR		0x1a
-
-#define FOP_SRC_S	0
-#define FOP_SRC_T	2
-#define FOP_SRC_Q	3
-
-#define FOP_FNC_ADDx	0
-#define FOP_FNC_CVTQL	0
-#define FOP_FNC_SUBx	1
-#define FOP_FNC_MULx	2
-#define FOP_FNC_DIVx	3
-#define FOP_FNC_CMPxUN	4
-#define FOP_FNC_CMPxEQ	5
-#define FOP_FNC_CMPxLT	6
-#define FOP_FNC_CMPxLE	7
-#define FOP_FNC_SQRTx	11
-#define FOP_FNC_CVTxS	12
-#define FOP_FNC_CVTxT	14
-#define FOP_FNC_CVTxQ	15
-
-#define MISC_TRAPB	0x0000
-#define MISC_EXCB	0x0400
-
-extern unsigned long alpha_read_fp_reg (unsigned long reg);
-extern void alpha_write_fp_reg (unsigned long reg, unsigned long val);
-extern unsigned long alpha_read_fp_reg_s (unsigned long reg);
-extern void alpha_write_fp_reg_s (unsigned long reg, unsigned long val);
-
-
-#ifdef MODULE
-
-MODULE_DESCRIPTION("FP Software completion module");
-
-extern long (*alpha_fp_emul_imprecise)(struct pt_regs *, unsigned long);
-extern long (*alpha_fp_emul) (unsigned long pc);
-
-static long (*save_emul_imprecise)(struct pt_regs *, unsigned long);
-static long (*save_emul) (unsigned long pc);
-
-long do_alpha_fp_emul_imprecise(struct pt_regs *, unsigned long);
-long do_alpha_fp_emul(unsigned long);
-
-int init_module(void)
-{
-	save_emul_imprecise = alpha_fp_emul_imprecise;
-	save_emul = alpha_fp_emul;
-	alpha_fp_emul_imprecise = do_alpha_fp_emul_imprecise;
-	alpha_fp_emul = do_alpha_fp_emul;
-	return 0;
-}
-
-void cleanup_module(void)
-{
-	alpha_fp_emul_imprecise = save_emul_imprecise;
-	alpha_fp_emul = save_emul;
-}
-
-#undef  alpha_fp_emul_imprecise
-#define alpha_fp_emul_imprecise		do_alpha_fp_emul_imprecise
-#undef  alpha_fp_emul
-#define alpha_fp_emul			do_alpha_fp_emul
-
-#endif /* MODULE */
-
-/* For 128-bit division.  */
-
-__complex__ unsigned long
-udiv128(unsigned long divisor_f0, unsigned long divisor_f1,
-	unsigned long dividend_f0, unsigned long dividend_f1)
-{
-	_FP_FRAC_DECL_2(quo);
-	_FP_FRAC_DECL_2(rem);
-	_FP_FRAC_DECL_2(tmp);
-	unsigned long i, num_bits, bit;
-	__complex__ unsigned long ret;
-
-	_FP_FRAC_SET_2(rem, _FP_ZEROFRAC_2);
-	_FP_FRAC_SET_2(quo, _FP_ZEROFRAC_2);
-
-	if (_FP_FRAC_ZEROP_2(divisor))
-		goto out;
-
-	if (_FP_FRAC_GT_2(divisor, dividend)) {
-		_FP_FRAC_COPY_2(rem, dividend);
-		goto out;
-	}
-
-	if (_FP_FRAC_EQ_2(divisor, dividend)) {
-		__FP_FRAC_SET_2(quo, 0, 1);
-		goto out;
-	}
-
-	num_bits = 128;
-	while (1) {
-		bit = _FP_FRAC_NEGP_2(dividend);
-		_FP_FRAC_COPY_2(tmp, rem);
-		_FP_FRAC_SLL_2(tmp, 1);
-		_FP_FRAC_LOW_2(tmp) |= bit;
-		if (! _FP_FRAC_GE_2(tmp, divisor))
-			break;
-		_FP_FRAC_COPY_2(rem, tmp);
-		_FP_FRAC_SLL_2(dividend, 1);
-		num_bits--;
-	}
-
-	for (i = 0; i < num_bits; i++) {
-		bit = _FP_FRAC_NEGP_2(dividend);
-		_FP_FRAC_SLL_2(rem, 1);
-		_FP_FRAC_LOW_2(rem) |= bit;
-		_FP_FRAC_SUB_2(tmp, rem, divisor);
-		bit = _FP_FRAC_NEGP_2(tmp);
-		_FP_FRAC_SLL_2(dividend, 1);
-		_FP_FRAC_SLL_2(quo, 1);
-		if (!bit) {
-			_FP_FRAC_LOW_2(quo) |= 1;
-			_FP_FRAC_COPY_2(rem, tmp);
-		}
-	}
-
-out:
-	__real__ ret = quo_f1;
-	__imag__ ret = rem_f1;
-	return ret;
-}
-
-/*
- * Emulate the floating point instruction at address PC.  Returns 0 if
- * emulation fails.  Notice that the kernel does not and cannot use FP
- * regs.  This is good because it means that instead of
- * saving/restoring all fp regs, we simply stick the result of the
- * operation into the appropriate register.
- */
-long
-alpha_fp_emul (unsigned long pc)
-{
-	FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
-	FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);
-
-	unsigned long fa, fb, fc, func, mode, src;
-	unsigned long fpcw = current->tss.flags;
-	unsigned long res, cmptype, va, vb, vc, fpcr;
-	__u32 insn;
-
-	MOD_INC_USE_COUNT;
-
-	get_user(insn, (__u32*)pc);
-	fc     = (insn >>  0) & 0x1f;	/* destination register */
-	fb     = (insn >> 16) & 0x1f;
-	fa     = (insn >> 21) & 0x1f;
-	func   = (insn >>  5) & 0xf;
-	src    = (insn >>  9) & 0x3;
-	mode   = (insn >> 11) & 0x3;
-	
-	fpcr = rdfpcr();
-
-	if (mode == 3) {
-	    /* Dynamic -- get rounding mode from fpcr.  */
-	    mode = (fpcr >> FPCR_DYN_SHIFT) & 3;
-	}
-
-	res = 0;
-
-	switch (src) {
-	case FOP_SRC_S:
-		va = alpha_read_fp_reg_s(fa);
-		vb = alpha_read_fp_reg_s(fb);
-		
-		__FP_UNPACK_S(SA, &va);
-		__FP_UNPACK_S(SB, &vb);
-
-		switch (func) {
-		case FOP_FNC_SUBx:
-			if (SB_c != FP_CLS_NAN)
-				SB_s ^= 1;
-			/* FALLTHRU */
-		case FOP_FNC_ADDx:
-			FP_ADD_S(SR, SA, SB);
-			goto pack_s;
-
-		case FOP_FNC_MULx:
-			FP_MUL_S(SR, SA, SB);
-			goto pack_s;
-
-		case FOP_FNC_DIVx:
-			if (SB_c == FP_CLS_ZERO && SA_c != FP_CLS_ZERO) {
-				res |= EFLAG_DIVZERO;
-				if (__FPU_TRAP_P(EFLAG_DIVZERO))
-					goto done;
-			}
-			FP_DIV_S(SR, SA, SB);
-			goto pack_s;
-
-		case FOP_FNC_SQRTx:
-			FP_SQRT_S(SR, SA);
-			goto pack_s;
-		}
-		goto bad_insn;
-
-	case FOP_SRC_T:
-		va = alpha_read_fp_reg(fa);
-		vb = alpha_read_fp_reg(fb);
-		
-		__FP_UNPACK_D(DA, &va);
-		__FP_UNPACK_D(DB, &vb);
-
-		switch (func) {
-		case FOP_FNC_SUBx:
-			if (DB_c != FP_CLS_NAN)
-				DB_s ^= 1;
-			/* FALLTHRU */
-		case FOP_FNC_ADDx:
-			FP_ADD_D(DR, DA, DB);
-			goto pack_d;
-
-		case FOP_FNC_MULx:
-			FP_MUL_D(DR, DA, DB);
-			goto pack_d;
-
-		case FOP_FNC_DIVx:
-			if (DB_c == FP_CLS_ZERO && DA_c != FP_CLS_ZERO) {
-				res |= EFLAG_DIVZERO;
-				if (__FPU_TRAP_P(EFLAG_DIVZERO))
-					goto done;
-			}
-			FP_DIV_D(DR, DA, DB);
-			goto pack_d;
-
-		case FOP_FNC_CMPxUN:
-			cmptype = CMPTXX_UN;
-			goto compare;
-		case FOP_FNC_CMPxEQ:
-			cmptype = CMPTXX_EQ;
-			goto compare;
-		case FOP_FNC_CMPxLT:
-			cmptype = CMPTXX_LT;
-			goto compare;
-		case FOP_FNC_CMPxLE:
-			cmptype = CMPTXX_LE;
-			goto compare;
-		compare:
-			FP_CMP_D(res, DA, DB, 3);
-			vc = 0;
-        		if (res == cmptype
-			    || (cmptype == CMPTXX_LE
-				&& (res == CMPTXX_LT || res == CMPTXX_EQ))) {
-				vc = 0x4000000000000000;  
-			}
-			goto done_d;
-
-		case FOP_FNC_SQRTx:
-			FP_SQRT_D(DR, DA);
-			goto pack_d;
-
-		case FOP_FNC_CVTxS:
-			/* It is irritating that DEC encoded CVTST with
-			   SRC == T_floating.  It is also interesting that
-			   the bit used to tell the two apart is /U... */
-			if (insn & 0x2000) {
-				FP_CONV(S,D,1,1,SR,DA);
-				goto pack_s;
-			} else {
-				/* CVTST need do nothing else but copy the
-				   bits and repack.  */
-				DR_c = DA_c;
-				DR_s = DA_s;
-				DR_e = DA_e;
-				DR_r = DA_r;
-				DR_f = DA_f;
-				goto pack_d;
-			}
-
-		case FOP_FNC_CVTxQ:
-			FP_TO_INT_D(vc, DA, 64, 1);
-			res = _FTOI_RESULT(DA);
-			goto done_d;
-		}
-		goto bad_insn;
-
-	case FOP_SRC_Q:
-		vb = alpha_read_fp_reg(fb);
-
-		switch (func) {
-		case FOP_FNC_CVTQL:
-			/* Notice: We can get here only due to an integer
-			   overflow.  Such overflows are reported as invalid
-			   ops.  We return the result the hw would have
-			   computed.  */
-			vc = ((vb & 0xc0000000) << 32 |	/* sign and msb */
-			      (vb & 0x3fffffff) << 29);	/* rest of the int */
-			res = EFLAG_INVALID;
-			goto done_d;
-
-		case FOP_FNC_CVTxS:
-			FP_FROM_INT_S(SR, ((long)vb), 64, long);
-			goto pack_s;
-
-		case FOP_FNC_CVTxT:
-			FP_FROM_INT_D(DR, ((long)vb), 64, long);
-			goto pack_d;
-		}
-		goto bad_insn;
-	}
-	goto bad_insn;
-
-pack_s:
-	res |= __FP_PACK_S(&vc, SR);
-	alpha_write_fp_reg_s(fc, vc);
-	goto done;
-
-pack_d:
-	res |= __FP_PACK_D(&vc, DR);
-done_d:
-	alpha_write_fp_reg(fc, vc);
-	goto done;
-
-	/*
-	 * Take the appropriate action for each possible
-	 * floating-point result:
-	 *
-	 *	- Set the appropriate bits in the FPCR
-	 *	- If the specified exception is enabled in the FPCR,
-	 *	  return.  The caller (entArith) will dispatch
-	 *	  the appropriate signal to the translated program.
-	 *
-	 * In addition, properly track the exception state in software
-	 * as described in the Alpha Architectre Handbook section 4.7.7.3.
-	 */
-done:
-	if (res) {
-		/* Record exceptions in software control word.  */
-		current->tss.flags
-		  = fpcw |= (res << IEEE_STATUS_TO_EXCSUM_SHIFT);
-
-		/* Update hardware control register */
-		fpcr &= (~FPCR_MASK | FPCR_DYN_MASK);
-		fpcr |= ieee_swcr_to_fpcr(fpcw);
-		wrfpcr(fpcr);
-
-		/* Do we generate a signal?  */
-		if (res & fpcw & IEEE_TRAP_ENABLE_MASK) {
-			MOD_DEC_USE_COUNT;
-			return 0;
-		}
-	}
-
-	/* We used to write the destination register here, but DEC FORTRAN
-	   requires that the result *always* be written... so we do the write
-	   immediately after the operations above.  */
-
-	MOD_DEC_USE_COUNT;
-	return 1;
-
-bad_insn:
-	printk(KERN_ERR "alpha_fp_emul: Invalid FP insn %#x at %#lx\n",
-	       insn, pc);
-	MOD_DEC_USE_COUNT;
-	return 0;
-}
-
-long
-alpha_fp_emul_imprecise (struct pt_regs *regs, unsigned long write_mask)
-{
-	unsigned long trigger_pc = regs->pc - 4;
-	unsigned long insn, opcode, rc;
-
-	MOD_INC_USE_COUNT;
-
-	/*
-	 * Turn off the bits corresponding to registers that are the
-	 * target of instructions that set bits in the exception
-	 * summary register.  We have some slack doing this because a
-	 * register that is the target of a trapping instruction can
-	 * be written at most once in the trap shadow.
-	 *
-	 * Branches, jumps, TRAPBs, EXCBs and calls to PALcode all
-	 * bound the trap shadow, so we need not look any further than
-	 * up to the first occurrence of such an instruction.
-	 */
-	while (write_mask) {
-		get_user(insn, (__u32*)(trigger_pc));
-		opcode = insn >> 26;
-		rc = insn & 0x1f;
-
-		switch (opcode) {
-		      case OPC_PAL:
-		      case OPC_JSR:
-		      case 0x30 ... 0x3f:	/* branches */
-			MOD_DEC_USE_COUNT;
-			return 0;
-
-		      case OPC_MISC:
-			switch (insn & 0xffff) {
-			      case MISC_TRAPB:
-			      case MISC_EXCB:
-				MOD_DEC_USE_COUNT;
-				return 0;
-
-			      default:
-				break;
-			}
-			break;
-
-		      case OPC_INTA:
-		      case OPC_INTL:
-		      case OPC_INTS:
-		      case OPC_INTM:
-			write_mask &= ~(1UL << rc);
-			break;
-
-		      case OPC_FLTC:
-		      case OPC_FLTV:
-		      case OPC_FLTI:
-		      case OPC_FLTL:
-			write_mask &= ~(1UL << (rc + 32));
-			break;
-		}
-		if (!write_mask) {
-			if (alpha_fp_emul(trigger_pc)) {
-				/* re-execute insns in trap-shadow: */
-				regs->pc = trigger_pc + 4;
-				MOD_DEC_USE_COUNT;
-				return 1;
-			}
-			break;
-		}
-		trigger_pc -= 4;
-	}
-	MOD_DEC_USE_COUNT;
-	return 0;
-}